[PATCH] D51083: [x86/SLH] Teach SLH to harden indirect branches and switches without retpolines.

Reid Kleckner via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 24 16:53:43 PDT 2018


rnk accepted this revision.
rnk added a comment.
This revision is now accepted and ready to land.

lgtm



================
Comment at: llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll:353
+; X64-PIC-NEXT:  .LBB5_1: # %bb0
+; X64-PIC-NEXT:    leaq {{.*}}(%rip), %rsi
+; X64-PIC-NEXT:    cmpq %rsi, %rdx
----------------
It would be nice if the test checked that it was using the correct label. I consider this {{.*}} scrub a bug in update_llc_test_checks.py. For every test I've added, I run the updater with --no_x86_scrip_rip or whatever the argument is.


Repository:
  rL LLVM

https://reviews.llvm.org/D51083





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