[PATCH] D51098: [AMDGPU] Add support for multi-dword s.buffer.load intrinsic

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added inline comments.


================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:809
+   llvm_i32_ty,       // byte offset(SGPR/VGPR/imm)
+   llvm_i1_ty],       // glc
+  [IntrNoMem]>,
----------------
Can we make this consistent with the new (vector) buffer intrinsics?


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:4947-4951
+    MachineMemOperand *MMO = MF.getMachineMemOperand(
+                                                     MachinePointerInfo(),
+                                                     MachineMemOperand::MOLoad | MachineMemOperand::MODereferenceable |
+                                                     MachineMemOperand::MOInvariant,
+                                                     VT.getStoreSize(), VT.getStoreSize());
----------------
clang-format?


Repository:
  rL LLVM

https://reviews.llvm.org/D51098