[PATCH] D50070: [X86] Improved sched models for X86 CMPXCHG* instructions

[Andrew V. Tischenko via Phabricator via llvm-commits]

avt77 added inline comments.


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Comment at: lib/Target/X86/X86SchedSandyBridge.td:119
+defm : X86WriteRes<WriteCMPXCHG,   [SBPort05,SBPort015], 5, [1,3], 4>;
+defm : X86WriteRes<WriteCMPXCHGLd, [SBPort015, SBPort05, SBPort4, SBPort23], 8, [1,2,1,2], 6>;
 
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avt77 wrote:
> craig.topper wrote:
> > The port4 and one of the port23 shouldn't be here. They come from WriteRMW that WriteCMPXCHGLd is paired with.
> Oh, yes, you're right. Tnx.
The problem here is the following: we can't use the paired version because it uses the default values [1,1] but we need 2 cycles for port23. It seems we have to redefine these intrs for SB or to remove the pairing with WriteRMW. I'd prefer to remove the pairing if you don't mind.


https://reviews.llvm.org/D50070