[llvm] r340379 - [CodeGenPrepare] Set debug loc when widening a switch condition

[Vedant Kumar via llvm-commits]

Author: vedantk
Date: Tue Aug 21 18:23:31 2018
New Revision: 340379

URL: http://llvm.org/viewvc/llvm-project?rev=340379&view=rev
Log:
[CodeGenPrepare] Set debug loc when widening a switch condition

Set a debug location on the cast instruction used to widen a switch
condition.

Modified:
    llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp
    llvm/trunk/test/Transforms/CodeGenPrepare/X86/widen_switch.ll

Modified: llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp?rev=340379&r1=340378&r2=340379&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp Tue Aug 21 18:23:31 2018
@@ -5853,6 +5853,7 @@ bool CodeGenPrepare::optimizeSwitchInst(
 
   auto *ExtInst = CastInst::Create(ExtType, Cond, NewType);
   ExtInst->insertBefore(SI);
+  ExtInst->setDebugLoc(SI->getDebugLoc());
   SI->setCondition(ExtInst);
   for (auto Case : SI->cases()) {
     APInt NarrowConst = Case.getCaseValue()->getValue();

Modified: llvm/trunk/test/Transforms/CodeGenPrepare/X86/widen_switch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CodeGenPrepare/X86/widen_switch.ll?rev=340379&r1=340378&r2=340379&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/CodeGenPrepare/X86/widen_switch.ll (original)
+++ llvm/trunk/test/Transforms/CodeGenPrepare/X86/widen_switch.ll Tue Aug 21 18:23:31 2018
@@ -1,6 +1,7 @@
 ;; x86 is chosen to show the transform when 8-bit and 16-bit registers are available.
 
 ; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown    | FileCheck %s --check-prefix=X86
+; RUN: opt < %s -debugify -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEBUG
 
 ; No change for x86 because 16-bit registers are part of the architecture.
 
@@ -60,6 +61,13 @@ return:
 ; X86-NEXT:  switch i32 %0, label %sw.default [
 ; X86-NEXT:    i32 10, label %sw.bb0
 ; X86-NEXT:    i32 131071, label %sw.bb1
+
+; DEBUG-LABEL: @widen_switch_i17(
+; DEBUG:       zext i17 %trunc to i32, !dbg [[switch_loc:![0-9]+]]
+; DEBUG-NEXT:  switch i32 {{.*}} [
+; DEBUG-NEXT:    label %sw.bb0
+; DEBUG-NEXT:    label %sw.bb1
+; DEBUG-NEXT:  ], !dbg [[switch_loc]]
 }
 
 ; If the switch condition is a sign-extended function argument, then the