[PATCH] D50913: [FPEnv] Don't need copysign/fabs/fneg constrained intrinsics

Kevin P. Neal via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 20 09:33:28 PDT 2018


kpn added a comment.

In https://reviews.llvm.org/D50913#1205990, @cameron.mcinally wrote:

> > If the fsub that led to the FNEG node was not constrained in the first place then this seems like a valid transform.
>
> Bah, sorry. My comment was ambiguous...
>
> I meant that the FNEG->FSUB xform is "bad" in the context Ulrich proposed. For example:
>
> The user writes a unary minus, -x, which is a bitwise operation and will never trap.


Do we know this for certain? For example, on SystemZ there are instructions for FNEG and abs, non-vector and vector. Those instructions are floating point instructions. And, yes, those instructions are defined to not trap. But do we know for certain that no architecture traps, even the ones that use floating point instructions for these operations?

I'm sticking with my thinking that a constrained fsub instruction should never be turned into an FNEG SDNode. It's a very simple rule that won't result in confused or surprised programmers. This rule also means a constrained FNEG would not be needed.


Repository:
  rL LLVM

https://reviews.llvm.org/D50913





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