[PATCH] D50873: [WebAssembly] v128.const

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added a comment.

Instruction selection part looks good. I guess other reviewers can give better feedback on the encoding/disassembling parts.



================
Comment at: lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp:184
     }
+    // Vector lane operands (not LEB encoded).
+    case WebAssembly::OPERAND_VEC_I8IMM: {
----------------
Are these added in order to prevent elements from being LEB-encoded one by one? SIMD immediates do not use LEB encoding?


================
Comment at: lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp:94
+        switch (Info.OperandType) {
+          case WebAssembly::OPERAND_I32IMM:
+            encodeSLEB128(int32_t(MO.getImm()), OS);
----------------
clang-format this switch-case block and also possibly other modified parts.


================
Comment at: lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp:112
+            break;
+               case WebAssembly::OPERAND_VEC_I32IMM:
+            support::endian::write<uint32_t>(OS, MO.getImm(), support::little);
----------------
Fix indentation (I guess it will be fixed anyway if you run clang-format though)


Repository:
  rL LLVM

https://reviews.llvm.org/D50873