[PATCH] D50817: [X86] Teach combineLoopSADPattern to handle cases where there is no loop and the add has two absolute difference inputs

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.
Herald added a subscriber: dmgreen.

Previously we asumed a vector reduction add is part of a loop and one of the input is a phi. But the code in SelectionDAGBuilder that sets vector reduction flag handles more cases than that. It just requires that the use chain ends in a horizontal reduction. And there are no other uses. This means it can handle unrolled reduction loops.

If the initial value of the reduction was 0, an unrolled loop would begin with a vector reduction add that has two sad inputs. Previously we would only transform one side of the add, but for this case we need to transform both sides.

I've created a lambda to reuse some of the code for both sides. And fixed the variables names to remove reference to "phi".

I believe madd loop pattern probably has the same issue, but my motivating case is sad.

I can pre-commit the current codegen as part of the review  if you want. I'll commit it in stages either way.


https://reviews.llvm.org/D50817

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/sad.ll

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