[PATCH] D50634: [RISCV] Add support for local PIC accessing

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 created this revision.
rogfer01 added reviewers: asb, efriedma, kito-cheng, apazos, mgrang.
Herald added subscribers: PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, shiva0217, niosHD, sabuasal, simoncook, johnrusso, rbar.

This is another small step towards adding PIC addressing support to the RISC-V backend.

In this change we enable the codegen flow to emit PC-relative adressing to (dso-)local variables (i.e. PIC addressing that does not involve the GOT table).

Accesses via GOT will be implemented in a future change once we have the missing MC bits needed.

The approach taken is close to the one used in other backends:

- Wrap the address in a target specific DAG node. In this case `RISCVISD::WRAPPER_PIC`
- Use as operand of the wrapper node the corresponding `Target*` dag node with a flag. This flag indicates the kind of PIC addressing (PC-rel or GOT).
- Using a custom inserter we expand `RISCVISD::WRAPPER_PIC` using the usual sequence `auipc` + `addi` in a new basic block. We fold, if possible, the addi offset into its user `load` and `store` instructions.

The new basic block needs its label always be emitted. Currently `AsmPrinter` does not emit a label for a basic block if the control flow just falls through to the block. So this change adds a `setLabelMustBeEmitted` to `MachineBasicBlock`.


https://reviews.llvm.org/D50634

Files:
  include/llvm/CodeGen/MachineBasicBlock.h
  lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfo.td
  lib/Target/RISCV/RISCVMCInstLower.cpp
  lib/Target/RISCV/RISCVSubtarget.cpp
  lib/Target/RISCV/RISCVSubtarget.h
  test/CodeGen/RISCV/blockaddr-pic.ll
  test/CodeGen/RISCV/global-addr-pic.ll

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