[PATCH] D49489: [VPlan] VPlan version of InterleavedAccessInfo.

Florian Hahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 9 09:35:57 PDT 2018


fhahn added inline comments.


================
Comment at: lib/Transforms/Vectorize/VPlan.cpp:584
+      Old2New;
+
+  VPRegionBlock *TopRegion = dyn_cast<VPRegionBlock>(Plan.getEntry());
----------------
dcaballe wrote:
> This algorithm assumes that there is only a region (top region) in the whole H-CFG but this is going to change pretty soon. Could you please change the implementation to recursively go inside other potential nested regions?
Will do. I just have to think a bit more how everything will fit together with outerloops, as the regular InterleavedAccessInfo only works on a single loop.


================
Comment at: lib/Transforms/Vectorize/VPlan.h:1337
 };
 
+class VPInterleavedAccessInfo {
----------------
dcaballe wrote:
> Just curious. How difficult would it be to templatize the IAI methods needed here? 
I am not entirely sure, but most of the regular IAI is related to building the interleave groups, which is not required here because we re-using the regular one.


https://reviews.llvm.org/D49489





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