[PATCH] D50518: [ARM] Disallow zexts in ARMCodeGenPrepare

Sam Parker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 9 09:17:29 PDT 2018


samparker created this revision.
samparker added reviewers: SjoerdMeijer, john.brawn, rnk, efriedma.
Herald added subscribers: chrib, kristof.beyls, srhines.
Herald added a reviewer: javed.absar.

Enabling ARMCodeGenPrepare by default caused a whole load of failures. This is due to zexts and truncs not being handled properly. ZExts are messy so it's just easier to disable for now and truncs are allowed only as 'sinks'. I still need to figure out why allowing them as 'sources' causes so many failures. The other main change is that we are explicit in the types that we converting to, it's now always 'TypeSize'. Type support is also now performed while checking for valid opcodes as it unnecessarily complicated having the checks are different stages.

I've moved the tests around too, so we have the zext and truncs in their own file as well as the overflowing opcode tests.


https://reviews.llvm.org/D50518

Files:
  lib/Target/ARM/ARMCodeGenPrepare.cpp
  test/CodeGen/ARM/arm-cgp-icmps.ll
  test/CodeGen/ARM/arm-cgp-overflow.ll
  test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
  test/CodeGen/ARM/arm-cgp-zext-truncs.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D50518.159936.patch
Type: text/x-patch
Size: 32732 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180809/d9106e5c/attachment.bin>


More information about the llvm-commits mailing list