[PATCH] D49994: Allow constraining virtual register's class within reason

[Alexey Zhikhartsev via Phabricator via llvm-commits]

alexey.zhikhar updated this revision to Diff 159565.
alexey.zhikhar edited the summary of this revision.
alexey.zhikhar added a comment.
Herald added subscribers: nhaehnle, nemanjai, arsenm.
Herald added a reviewer: javed.absar.

Differential is updated with:

- Fixed unit tests for SystemZ and PowerPC
- Bug fix for AMDGPU: AMD's `TargetInstrInfo::canInsertSelect()` had an assertion that was too restrictive + fixed missing switch cases.
- Fixed unit tests for atomic operations on ARM: note that the number of mov-s did not increase after applying the patch.


https://reviews.llvm.org/D49994

Files:
  lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  test/CodeGen/AArch64/arm64-atomic.ll
  test/CodeGen/AArch64/combine-comparisons-by-cse.ll
  test/CodeGen/ARM/2011-08-25-ldmia_ret.ll
  test/CodeGen/ARM/atomic-64bit.ll
  test/CodeGen/ARM/atomic-cmp.ll
  test/CodeGen/ARM/atomic-ops-v8.ll
  test/CodeGen/PowerPC/vsx.ll
  test/CodeGen/SystemZ/cond-move-03.ll

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