[PATCH] D49929: [AArch64] Disallow the MachO specific .loh directive for windows

Tim Northover via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 1 06:12:26 PDT 2018


t.p.northover added a comment.

> I suppose that this is caused by the pair-wise split relocations à la `IMAGE_REL_ARM_MOV32T`for PE/COFF

The hints are there so that the linker can turn (non-adjacent) `ADRP/ADD` sequences, and similar, into `ADR/NOP` if the referenced symbol ends up close enough; this saves a cycle or so on Apple CPUs. To do that the compiler marks instruction-pairs used to generate a single address and saves that data off in a special MachO load command. I suppose it is sort of a souped-up relocation which specifies two addresses to be relocated instead of just one.

In principle someone could come up with an ELF section type to embed the data and add support to one of those linkers; but no-one has yet.


Repository:
  rL LLVM

https://reviews.llvm.org/D49929





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