[llvm] r338222 - [DAGCombiner] Remove unnecessary calls to AddToWorklist.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 29 11:39:26 PDT 2018
Author: ctopper
Date: Sun Jul 29 11:39:26 2018
New Revision: 338222
URL: http://llvm.org/viewvc/llvm-project?rev=338222&view=rev
Log:
[DAGCombiner] Remove unnecessary calls to AddToWorklist.
The DAGCombiner has a mechanism for ensuring all nodes have been visited at least once. Every time a node is visited, it makes sure its operands have been in the worklist at least once. This ensures that when multiple nodes are created by a combine, only the last node needs to be returned. The earlier nodes can all be found Through this operand check. These means we don't need to explicitly add nodes to the worklist when a combine creates multiple nodes.
I've removed the most obvious cases here. There are probably more than can be removed.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=338222&r1=338221&r2=338222&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Jul 29 11:39:26 2018
@@ -3349,14 +3349,12 @@ SDValue DAGCombiner::visitREM(SDNode *N)
if (DAG.isKnownToBeAPowerOfTwo(N1)) {
// fold (urem x, pow2) -> (and x, pow2-1)
SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N1, NegOne);
- AddToWorklist(Add.getNode());
return DAG.getNode(ISD::AND, DL, VT, N0, Add);
}
if (N1.getOpcode() == ISD::SHL &&
DAG.isKnownToBeAPowerOfTwo(N1.getOperand(0))) {
// fold (urem x, (shl pow2, y)) -> (and x, (add (shl pow2, y), -1))
SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N1, NegOne);
- AddToWorklist(Add.getNode());
return DAG.getNode(ISD::AND, DL, VT, N0, Add);
}
}
@@ -3376,10 +3374,7 @@ SDValue DAGCombiner::visitREM(SDNode *N)
if (OptimizedDiv.getNode() && OptimizedDiv.getOpcode() != ISD::UDIVREM &&
OptimizedDiv.getOpcode() != ISD::SDIVREM) {
SDValue Mul = DAG.getNode(ISD::MUL, DL, VT, OptimizedDiv, N1);
- SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, Mul);
- AddToWorklist(OptimizedDiv.getNode());
- AddToWorklist(Mul.getNode());
- return Sub;
+ return DAG.getNode(ISD::SUB, DL, VT, N0, Mul);
}
}
@@ -5130,7 +5125,6 @@ SDValue DAGCombiner::visitOR(SDNode *N)
if (SDValue COR = DAG.FoldConstantArithmetic(
ISD::OR, SDLoc(N1), VT, N1.getNode(), N0.getOperand(1).getNode())) {
SDValue IOR = DAG.getNode(ISD::OR, SDLoc(N0), VT, N0.getOperand(0), N1);
- AddToWorklist(IOR.getNode());
return DAG.getNode(ISD::AND, SDLoc(N), VT, COR, IOR);
}
}
@@ -5884,7 +5878,6 @@ SDValue DAGCombiner::visitXOR(SDNode *N)
SDLoc DL(N0);
V = DAG.getNode(ISD::XOR, DL, V.getValueType(), V,
DAG.getConstant(1, DL, V.getValueType()));
- AddToWorklist(V.getNode());
return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), VT, V);
}
@@ -5896,7 +5889,6 @@ SDValue DAGCombiner::visitXOR(SDNode *N)
unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND;
LHS = DAG.getNode(ISD::XOR, SDLoc(LHS), VT, LHS, N1); // LHS = ~LHS
RHS = DAG.getNode(ISD::XOR, SDLoc(RHS), VT, RHS, N1); // RHS = ~RHS
- AddToWorklist(LHS.getNode()); AddToWorklist(RHS.getNode());
return DAG.getNode(NewOpcode, SDLoc(N), VT, LHS, RHS);
}
}
@@ -5908,7 +5900,6 @@ SDValue DAGCombiner::visitXOR(SDNode *N)
unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND;
LHS = DAG.getNode(ISD::XOR, SDLoc(LHS), VT, LHS, N1); // LHS = ~LHS
RHS = DAG.getNode(ISD::XOR, SDLoc(RHS), VT, RHS, N1); // RHS = ~RHS
- AddToWorklist(LHS.getNode()); AddToWorklist(RHS.getNode());
return DAG.getNode(NewOpcode, SDLoc(N), VT, LHS, RHS);
}
}
@@ -5917,7 +5908,6 @@ SDValue DAGCombiner::visitXOR(SDNode *N)
N0->getOperand(1) == N1) {
SDValue X = N0->getOperand(0);
SDValue NotX = DAG.getNOT(SDLoc(X), X, VT);
- AddToWorklist(NotX.getNode());
return DAG.getNode(ISD::AND, SDLoc(N), VT, NotX, N1);
}
@@ -6278,7 +6268,6 @@ SDValue DAGCombiner::visitSHL(SDNode *N)
SDValue NewSHL = DAG.getNode(ISD::SHL, DL, NewOp0.getValueType(),
NewOp0,
DAG.getConstant(c2, DL, CountVT));
- AddToWorklist(NewSHL.getNode());
return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N0), VT, NewSHL);
}
}
@@ -6349,8 +6338,6 @@ SDValue DAGCombiner::visitSHL(SDNode *N)
isConstantOrConstantVector(N0.getOperand(1), /* No Opaques */ true)) {
SDValue Shl0 = DAG.getNode(ISD::SHL, SDLoc(N0), VT, N0.getOperand(0), N1);
SDValue Shl1 = DAG.getNode(ISD::SHL, SDLoc(N1), VT, N0.getOperand(1), N1);
- AddToWorklist(Shl0.getNode());
- AddToWorklist(Shl1.getNode());
return DAG.getNode(N0.getOpcode(), SDLoc(N), VT, Shl0, Shl1);
}
@@ -6632,7 +6619,6 @@ SDValue DAGCombiner::visitSRL(SDNode *N)
SDLoc DL(N);
SDValue Mask =
DAG.getNode(ISD::SRL, DL, VT, DAG.getAllOnesConstant(DL, VT), N1);
- AddToWorklist(Mask.getNode());
return DAG.getNode(ISD::AND, DL, VT, N0.getOperand(0), Mask);
}
@@ -6651,7 +6637,6 @@ SDValue DAGCombiner::visitSRL(SDNode *N)
N0.getOperand(0),
DAG.getConstant(ShiftAmt, DL0,
getShiftAmountTy(SmallVT)));
- AddToWorklist(SmallShift.getNode());
APInt Mask = APInt::getLowBitsSet(OpSizeInBits, OpSizeInBits - ShiftAmt);
SDLoc DL(N);
return DAG.getNode(ISD::AND, DL, VT,
@@ -6696,7 +6681,6 @@ SDValue DAGCombiner::visitSRL(SDNode *N)
Op = DAG.getNode(ISD::SRL, DL, VT, Op,
DAG.getConstant(ShAmt, DL,
getShiftAmountTy(Op.getValueType())));
- AddToWorklist(Op.getNode());
}
SDLoc DL(N);
@@ -7022,13 +7006,11 @@ SDValue DAGCombiner::visitSELECT(SDNode
// fold (select C, 0, X) -> (and (not C), X)
if (VT == VT0 && VT == MVT::i1 && isNullConstant(N1)) {
SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT);
- AddToWorklist(NOTNode.getNode());
return DAG.getNode(ISD::AND, DL, VT, NOTNode, N2);
}
// fold (select C, X, 1) -> (or (not C), X)
if (VT == VT0 && VT == MVT::i1 && isOneConstant(N2)) {
SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT);
- AddToWorklist(NOTNode.getNode());
return DAG.getNode(ISD::OR, DL, VT, NOTNode, N1);
}
// fold (select X, Y, X) -> (and X, Y)
@@ -7600,8 +7582,6 @@ SDValue DAGCombiner::visitVSELECT(SDNode
ISD::SRA, DL, VT, LHS,
DAG.getConstant(VT.getScalarSizeInBits() - 1, DL, VT));
SDValue Add = DAG.getNode(ISD::ADD, DL, VT, LHS, Shift);
- AddToWorklist(Shift.getNode());
- AddToWorklist(Add.getNode());
return DAG.getNode(ISD::XOR, DL, VT, Add, Shift);
}
@@ -9317,10 +9297,8 @@ SDValue DAGCombiner::visitTRUNCATE(SDNod
EVT AmtVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout());
SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(0));
- if (AmtVT != Amt.getValueType()) {
+ if (AmtVT != Amt.getValueType())
Amt = DAG.getZExtOrTrunc(Amt, SL, AmtVT);
- AddToWorklist(Amt.getNode());
- }
return DAG.getNode(ISD::SHL, SL, VT, Trunc, Amt);
}
}
@@ -9424,7 +9402,6 @@ SDValue DAGCombiner::visitTRUNCATE(SDNod
continue;
}
SDValue NV = DAG.getNode(ISD::TRUNCATE, SDLoc(V), VTs[i], V);
- AddToWorklist(NV.getNode());
Opnds.push_back(NV);
}
return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, Opnds);
@@ -10728,10 +10705,9 @@ SDValue DAGCombiner::visitFADD(SDNode *N
} // enable-unsafe-fp-math
// FADD -> FMA combines:
- if (SDValue Fused = visitFADDForFMACombine(N)) {
- AddToWorklist(Fused.getNode());
+ if (SDValue Fused = visitFADDForFMACombine(N))
return Fused;
- }
+
return SDValue();
}
@@ -10803,10 +10779,8 @@ SDValue DAGCombiner::visitFSUB(SDNode *N
}
// FSUB -> FMA combines:
- if (SDValue Fused = visitFSUBForFMACombine(N)) {
- AddToWorklist(Fused.getNode());
+ if (SDValue Fused = visitFSUBForFMACombine(N))
return Fused;
- }
return SDValue();
}
@@ -10955,10 +10929,8 @@ SDValue DAGCombiner::visitFMUL(SDNode *N
}
// FMUL -> FMA combines:
- if (SDValue Fused = visitFMULForFMADistributiveCombine(N)) {
- AddToWorklist(Fused.getNode());
+ if (SDValue Fused = visitFMULForFMADistributiveCombine(N))
return Fused;
- }
return SDValue();
}
@@ -11033,7 +11005,6 @@ SDValue DAGCombiner::visitFMA(SDNode *N)
if (N1CFP->isExactlyValue(-1.0) &&
(!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) {
SDValue RHSNeg = DAG.getNode(ISD::FNEG, DL, VT, N0);
- AddToWorklist(RHSNeg.getNode());
// TODO: The FMA node should have flags that propagate to this node.
return DAG.getNode(ISD::FADD, DL, VT, N2, RHSNeg);
}
@@ -11185,7 +11156,6 @@ SDValue DAGCombiner::visitFDIV(SDNode *N
if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0),
Flags)) {
RV = DAG.getNode(ISD::FP_EXTEND, SDLoc(N1), VT, RV);
- AddToWorklist(RV.getNode());
return DAG.getNode(ISD::FMUL, DL, VT, N0, RV, Flags);
}
} else if (N1.getOpcode() == ISD::FP_ROUND &&
@@ -11193,7 +11163,6 @@ SDValue DAGCombiner::visitFDIV(SDNode *N
if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0),
Flags)) {
RV = DAG.getNode(ISD::FP_ROUND, SDLoc(N1), VT, RV, N1.getOperand(1));
- AddToWorklist(RV.getNode());
return DAG.getNode(ISD::FMUL, DL, VT, N0, RV, Flags);
}
} else if (N1.getOpcode() == ISD::FMUL) {
@@ -11213,17 +11182,15 @@ SDValue DAGCombiner::visitFDIV(SDNode *N
// x / (y * sqrt(z)) -> x * (rsqrt(z) / y)
if (SDValue RV = buildRsqrtEstimate(SqrtOp.getOperand(0), Flags)) {
RV = DAG.getNode(ISD::FDIV, SDLoc(N1), VT, RV, OtherOp, Flags);
- AddToWorklist(RV.getNode());
return DAG.getNode(ISD::FMUL, DL, VT, N0, RV, Flags);
}
}
}
// Fold into a reciprocal estimate and multiply instead of a real divide.
- if (SDValue RV = BuildReciprocalEstimate(N1, Flags)) {
- AddToWorklist(RV.getNode());
+ if (SDValue RV = BuildReciprocalEstimate(N1, Flags))
return DAG.getNode(ISD::FMUL, DL, VT, N0, RV, Flags);
- }
+
}
// (fdiv (fneg X), (fneg Y)) -> (fdiv X, Y)
@@ -11583,7 +11550,6 @@ SDValue DAGCombiner::visitFP_ROUND(SDNod
if (N0.getOpcode() == ISD::FCOPYSIGN && N0.getNode()->hasOneUse()) {
SDValue Tmp = DAG.getNode(ISD::FP_ROUND, SDLoc(N0), VT,
N0.getOperand(0), N1);
- AddToWorklist(Tmp.getNode());
return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT,
Tmp, N0.getOperand(1));
}
@@ -11743,7 +11709,6 @@ SDValue DAGCombiner::visitFNEG(SDNode *N
SDLoc DL0(N0);
Int = DAG.getNode(ISD::XOR, DL0, IntVT, Int,
DAG.getConstant(SignMask, DL0, IntVT));
- AddToWorklist(Int.getNode());
return DAG.getBitcast(VT, Int);
}
}
@@ -11848,7 +11813,6 @@ SDValue DAGCombiner::visitFABS(SDNode *N
SDLoc DL(N0);
Int = DAG.getNode(ISD::AND, DL, IntVT, Int,
DAG.getConstant(SignMask, DL, IntVT));
- AddToWorklist(Int.getNode());
return DAG.getBitcast(N->getValueType(0), Int);
}
}
@@ -14857,7 +14821,6 @@ SDValue DAGCombiner::visitINSERT_VECTOR_
// Swap nodes.
SDValue NewOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT,
InVec.getOperand(0), InVal, EltNo);
- AddToWorklist(NewOp.getNode());
return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(InVec.getNode()),
VT, NewOp, InVec.getOperand(1), InVec.getOperand(2));
}
@@ -17243,7 +17206,6 @@ SDValue DAGCombiner::visitINSERT_SUBVECT
// Swap nodes.
SDValue NewOp = DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N), VT,
N0.getOperand(0), N1, N2);
- AddToWorklist(NewOp.getNode());
return DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N0.getNode()),
VT, NewOp, N0.getOperand(1), N0.getOperand(2));
}
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