[PATCH] D49966: [X86] Performing DAG pruning before selection of LEA instructions.

[Jatin Bhateja via Phabricator via llvm-commits]

jbhateja added inline comments.


================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:712
+  unsigned Opcode = N->getOpcode();
+  if (Opcode == ISD::SHL) {
+    SDNode *Shift = N->getOperand(1).getNode();
----------------
lebedev.ri wrote:
> craig.topper wrote:
> > Why are we matching the pattern in reverse? Normally we would look for a sub followed by a shift. Why are we starting with a shift and looking backwards?
> Early return?

Following DAG transformation is being done in this revision 

  %1 = SHL X , 2
  %2 = SUB Y , %1
         |
         V
  %1 = SUB 0 , X
  %2 = SHL %1 , 2  -> A 
  %3 = ADD Y , %2  -> B

We are trying to remap SHL + SUB pattern so that it can be consumed easily, transformation is currently not kicking in for any SUB patterns but only for case where SUB is a USER of SHL.



Repository:
  rL LLVM

https://reviews.llvm.org/D49966