[PATCH] D49966: [X86] Performing DAG pruning before selection of LEA instructions.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 29 10:54:18 PDT 2018


craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:712
+  unsigned Opcode = N->getOpcode();
+  if (Opcode == ISD::SHL) {
+    SDNode *Shift = N->getOperand(1).getNode();
----------------
Why are we matching the pattern in reverse? Normally we would look for a sub followed by a shift. Why are we starting with a shift and looking backwards?


Repository:
  rL LLVM

https://reviews.llvm.org/D49966





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