[PATCH] D49556: [X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: spatel, craig.topper, lebedev.ri, andreadb.

We have a number of cases where we fail to reduce vector op widths, performing the op in a larger vector and then extracting a subvector. This is often because by default it would create illegal types.

This peephole patch attempts to handle a few common cases detailed in PR36761, which typically involved extension+conversion to vX2f64 types.

The current code isn't very generic - I'm not sure how many more cases we may need to support in the future?


Repository:
  rL LLVM

https://reviews.llvm.org/D49556

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
  test/CodeGen/X86/trunc-subvector.ll
  test/CodeGen/X86/vec_fpext.ll
  test/CodeGen/X86/vec_int_to_fp.ll

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