[PATCH] D49463: [ARM] Add new feature to enable optimizing the VFD registers

[silviu.baranga@arm.com via Phabricator via llvm-commits]

sbaranga added inline comments.


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Comment at: llvm/lib/Target/ARM/ARM.td:200
+// VFP register widths.
+def FeatureStrictVFPWidth : SubtargetFeature<"strict-vfp-sd",
+                                             "StrictVFPWidth", "true",
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evandro wrote:
> sbaranga wrote:
> > I think the description/name is somewhat confusing.
> > 
> > This enables using vdup instructions to move from the vfp execution domain to neon, which on some cores (at least Cortex-A15) is faster.
> What do you suggest?
Something like FeatureUseVDUPForFPToNEON? Ideally something shorter, but that's the best that I can come up with at the moment.

The comment should say something along the lines that it's profitable for the target to use a VDUP instruction when performing a transition from the VFP to NEON execution domain.


https://reviews.llvm.org/D49463