[PATCH] D49218: [Sparc] Use the IntPair reg class for r constraints with value type f64

[Daniel Cederman via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL337370: [Sparc] Use the IntPair reg class for r constraints with value type f64 (authored by dcederman, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D49218?vs=155123&id=156029#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D49218

Files:
  llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
  llvm/trunk/test/CodeGen/SPARC/inlineasm.ll


Index: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
@@ -3489,7 +3489,7 @@
   if (Constraint.size() == 1) {
     switch (Constraint[0]) {
     case 'r':
-      if (VT == MVT::v2i32)
+      if (VT == MVT::v2i32 || VT == MVT::f64)
         return std::make_pair(0U, &SP::IntPairRegClass);
       else
         return std::make_pair(0U, &SP::IntRegsRegClass);
Index: llvm/trunk/test/CodeGen/SPARC/inlineasm.ll
===================================================================
--- llvm/trunk/test/CodeGen/SPARC/inlineasm.ll
+++ llvm/trunk/test/CodeGen/SPARC/inlineasm.ll
@@ -130,3 +130,12 @@
   tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, double 11.0)
   ret void
 }
+
+; CHECK-LABEL: test_constraint_r_f64:
+; CHECK: std %o0, [%sp+96]
+; CHECK: ldd [%sp+96], %f0
+define double @test_constraint_r_f64() {
+entry:
+  %0 = call double asm sideeffect "", "=r"()
+  ret double %0
+}


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