[llvm] r337370 - [Sparc] Use the IntPair reg class for r constraints with value type f64

[Daniel Cederman via llvm-commits]

Author: dcederman
Date: Wed Jul 18 02:25:33 2018
New Revision: 337370

URL: http://llvm.org/viewvc/llvm-project?rev=337370&view=rev
Log:
[Sparc] Use the IntPair reg class for r constraints with value type f64

Summary: This is how it appears to be handled in GCC and it prevents a
"Unknown mismatch" error in the SelectionDAGBuilder.

Reviewers: venkatra, jyknight, jrtc27

Reviewed By: jyknight, jrtc27

Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D49218

Modified:
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
    llvm/trunk/test/CodeGen/SPARC/inlineasm.ll

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=337370&r1=337369&r2=337370&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Wed Jul 18 02:25:33 2018
@@ -3489,7 +3489,7 @@ SparcTargetLowering::getRegForInlineAsmC
   if (Constraint.size() == 1) {
     switch (Constraint[0]) {
     case 'r':
-      if (VT == MVT::v2i32)
+      if (VT == MVT::v2i32 || VT == MVT::f64)
         return std::make_pair(0U, &SP::IntPairRegClass);
       else
         return std::make_pair(0U, &SP::IntRegsRegClass);

Modified: llvm/trunk/test/CodeGen/SPARC/inlineasm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/inlineasm.ll?rev=337370&r1=337369&r2=337370&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/inlineasm.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/inlineasm.ll Wed Jul 18 02:25:33 2018
@@ -130,3 +130,12 @@ entry:
   tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, double 11.0)
   ret void
 }
+
+; CHECK-LABEL: test_constraint_r_f64:
+; CHECK: std %o0, [%sp+96]
+; CHECK: ldd [%sp+96], %f0
+define double @test_constraint_r_f64() {
+entry:
+  %0 = call double asm sideeffect "", "=r"()
+  ret double %0
+}