[llvm] r337350 - Fix build failures from r337347, found by clang

[Justin Hibbits via llvm-commits]

Author: jhibbits
Date: Tue Jul 17 22:19:25 2018
New Revision: 337350

URL: http://llvm.org/viewvc/llvm-project?rev=337350&view=rev
Log:
Fix build failures from r337347, found by clang

* Delete a no-longer-used override, and mark the other
getRegisterTypeForCallingConv() as override.
* SPE only supports i32, not i64, as the internal type, so simply remove
the type check, so that DestReg and Opc are provably always set.

GCC 6.4 did not warn about either of the above.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h

Modified: llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp?rev=337350&r1=337349&r2=337350&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp Tue Jul 17 22:19:25 2018
@@ -1223,13 +1223,11 @@ bool PPCFastISel::SelectFPToI(const Inst
   unsigned Opc;
 
   if (PPCSubTarget->hasSPE()) {
-    if (DstVT == MVT::i32) {
-      DestReg = createResultReg(&PPC::GPRCRegClass);
-      if (IsSigned)
-        Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
-      else
-        Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
-    }
+    DestReg = createResultReg(&PPC::GPRCRegClass);
+    if (IsSigned)
+      Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
+    else
+      Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
   } else {
     DestReg = createResultReg(&PPC::F8RCRegClass);
     if (DstVT == MVT::i32)

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=337350&r1=337349&r2=337350&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Jul 17 22:19:25 2018
@@ -1237,12 +1237,6 @@ MVT PPCTargetLowering::getRegisterTypeFo
   return PPCTargetLowering::getRegisterType(Context, VT);
 }
 
-MVT PPCTargetLowering::getRegisterTypeForCallingConv(MVT VT) const {
-  if (Subtarget.hasSPE() && VT == MVT::f64)
-    return MVT::i32;
-  return PPCTargetLowering::getRegisterType(VT);
-}
-
 bool PPCTargetLowering::useSoftFloat() const {
   return Subtarget.useSoftFloat();
 }

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=337350&r1=337349&r2=337350&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Tue Jul 17 22:19:25 2018
@@ -874,9 +874,8 @@ namespace llvm {
     unsigned getNumRegistersForCallingConv(LLVMContext &Context,
                                            EVT VT) const override;
 
-    MVT getRegisterTypeForCallingConv(MVT VT) const;
     MVT getRegisterTypeForCallingConv(LLVMContext &Context,
-                                      EVT VT) const;
+                                      EVT VT) const override;
 
   private:
     struct ReuseLoadInfo {