[PATCH] D49243: [X86] Improved sched models for X86 BT*rr instructions

[Andrew V. Tischenko via Phabricator via llvm-commits]

avt77 updated this revision to Diff 155868.
avt77 added a comment.

Now we use WriteRes instead of *WriteResPair.
Folded versions of the intrs will be implemented in the next patches.


https://reviews.llvm.org/D49243

Files:
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86SchedBroadwell.td
  lib/Target/X86/X86SchedHaswell.td
  lib/Target/X86/X86SchedSandyBridge.td
  lib/Target/X86/X86SchedSkylakeClient.td
  lib/Target/X86/X86SchedSkylakeServer.td
  lib/Target/X86/X86Schedule.td
  lib/Target/X86/X86ScheduleAtom.td
  lib/Target/X86/X86ScheduleBtVer2.td
  lib/Target/X86/X86ScheduleSLM.td
  lib/Target/X86/X86ScheduleZnver1.td
  utils/TableGen/CodeGenSchedule.cpp
  utils/TableGen/CodeGenSchedule.h

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