[PATCH] D49413: [x86/SLH] Flesh out the data-invariant instruction table a bit based on feedback from Craig.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 16 23:58:52 PDT 2018


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp:869
+  // Shift and rotate.
+  case X86::RCL8r1:  case X86::RCL16r1:  case X86::RCL32r1:  case X86::RCL64r1:
+  case X86::RCL8rCL: case X86::RCL16rCL: case X86::RCL32rCL: case X86::RCL64rCL:
----------------
Drop the RCR/RCL instructions? We don't ever isel them and they are multi uop instructions.


================
Comment at: llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp:963
   // instructions to exhibit that behavior.
   case X86::MULX32rr:
   case X86::MULX64rr:
----------------
These are double width multiplies too. Should we drop them?


Repository:
  rL LLVM

https://reviews.llvm.org/D49413





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