[PATCH] D49382: [InstrSimplify] fold sdiv if two operands are negatived and non-overflow

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 16 08:42:17 PDT 2018


shchenz created this revision.
shchenz added reviewers: spatel, nemanjai.
Herald added a subscriber: hiraditya.

We add folding support for add instruction in https://reviews.llvm.org/D49216. Test cases are added at https://reviews.llvm.org/rL337179.

we should also fold for sdiv instruction if sdiv's two operands are negatived leverage new added interface isKnownNegation() in https://reviews.llvm.org/D49216. for example:

  define i32 @negated_operand(i32 %x) {
    %negx = sub nsw i32 0, %x
    %div = sdiv i32 %negx, %x
    ret i32 %div
  }

can be folded to

  define i32 @negated_operand(i32 %x) {
    ret i32 -1
  }

Note: we must ensure sdiv two operands are non-overflow. Otherwise, the optimization is not right.
Result from Alive:
testing transform:

  %sub = sub i8 0, %x
  %div = sdiv i8 %x, %sub

=>

  %div = i8 -1

testing result:
ERROR: Mismatch in values of i8 %div 
Example: 
%x i8 = 0x80 (128, -128) 
%sub i8 = 0x80 (128, -128) 
Source value: 0x01 (1) 
Target value: 0xFF (255, -1)


https://reviews.llvm.org/D49382

Files:
  llvm/lib/Analysis/InstructionSimplify.cpp
  llvm/test/Transforms/InstCombine/sdiv.ll


Index: llvm/test/Transforms/InstCombine/sdiv.ll
===================================================================
--- llvm/test/Transforms/InstCombine/sdiv.ll
+++ llvm/test/Transforms/InstCombine/sdiv.ll
@@ -2,32 +2,25 @@
 
 define i32 @negated_operand(i32 %x) {
 ; CHECK-LABEL: @negated_operand(
-; CHECK-NEXT:    [[NEGX:%.*]] = sub nsw i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[NEGX]], [[X]]
-; CHECK-NEXT:    ret i32 [[DIV]]
+; CHECK-NEXT:    ret i32 -1
 ;
   %negx = sub nsw i32 0, %x
   %div = sdiv i32 %negx, %x
   ret i32 %div
 }
 
 define <2 x i32> @negated_operand_commute_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @negated_operand_commute_vec(
-; CHECK-NEXT:    [[NEGX:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv <2 x i32> [[NEGX]], [[X]]
-; CHECK-NEXT:    ret <2 x i32> [[DIV]]
+; CHECK-NEXT:    ret <2 x i32> <i32 -1, i32 -1>
 ;
   %negx = sub nsw <2 x i32> zeroinitializer, %x
   %div = sdiv <2 x i32> %negx, %x
   ret <2 x i32> %div
 }
 
 define i32 @knownnegation(i32 %x, i32 %y) {
 ; CHECK-LABEL: @knownnegation(
-; CHECK-NEXT:    [[XY:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[YX:%.*]] = sub nsw i32 [[Y]], [[X]]
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv i32 [[XY]], [[YX]]
-; CHECK-NEXT:    ret i32 [[DIV]]
+; CHECK-NEXT:    ret i32 -1
 ;
   %xy = sub nsw i32 %x, %y
   %yx = sub nsw i32 %y, %x
@@ -37,10 +30,7 @@
 
 define <2 x i32> @knownnegation_commute_vec(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @knownnegation_commute_vec(
-; CHECK-NEXT:    [[XY:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[YX:%.*]] = sub nsw <2 x i32> [[Y]], [[X]]
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv <2 x i32> [[XY]], [[YX]]
-; CHECK-NEXT:    ret <2 x i32> [[DIV]]
+; CHECK-NEXT:    ret <2 x i32> <i32 -1, i32 -1>
 ;
   %xy = sub nsw <2 x i32> %x, %y
   %yx = sub nsw <2 x i32> %y, %x
Index: llvm/lib/Analysis/InstructionSimplify.cpp
===================================================================
--- llvm/lib/Analysis/InstructionSimplify.cpp
+++ llvm/lib/Analysis/InstructionSimplify.cpp
@@ -1085,6 +1085,22 @@
 }
 
 Value *llvm::SimplifySDivInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) {
+  // If two operands are negation and no signed overflow, return -1.
+  if (isKnownNegation(Op0, Op1)) {
+    bool nsw = true;
+
+    // Op0 is no signed wrap.
+    if (match(Op0, m_Sub(m_Value(), m_Value())))
+      nsw &= (cast<OverflowingBinaryOperator>(Op0))->hasNoSignedWrap();
+
+    // Op1 is no signed wrap.
+    if (match(Op1, m_Sub(m_Value(), m_Value())))
+      nsw &= (cast<OverflowingBinaryOperator>(Op1))->hasNoSignedWrap();
+
+    if (nsw)
+      return Constant::getAllOnesValue(Op0->getType());
+  }
+
   return ::SimplifySDivInst(Op0, Op1, Q, RecursionLimit);
 }
 


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