[PATCH] D49196: [llvm-mca][BtVer2] teach how to identify false dependencies on partially written registers.

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

ZnVer1 will need updating, too.
I could take a look, but i have an immediate question about FP registers:



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Comment at: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td:56
 // Reference: www.realworldtech.com/jaguar/4/
 def JFpuPRF: RegisterFile<72, [VR64, VR128, VR256], [1, 1, 2]>;
 
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A bit late, but i'm not sure about the FP registers.
```
But the high and low 64 bits of a 128 bit register are treated as independent on
Bobcat, and the high and low 128 bits of a 256 bit register are treated as independent on
Jaguar.
```
Does that mean that it should be `def JFpuPRF: RegisterFile<72, [VR128, VR256], [1, 1, 2]>;` ?
Or does that mean `on Bobcat <and later>`?


Repository:
  rL LLVM

https://reviews.llvm.org/D49196