[PATCH] D49266: [X86][AArch64][DAGCombine] Unfold 'check for [no] signed truncation' pattern

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

Just a few nits - otherwise, LGTM.



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Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:1853-1855
+/// There are multiple IR patterns that could be checking whether certain
+/// signed truncation would be lossy or not. The pattern which is best at IR
+/// level, lowers badly. Thus, we want to optimize (unfold) it.
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Would be better to explain what "signed truncation" means right here...or just remove and let the formulas in the later comments speak for themselves?

lowers badly -> may not lower optimally


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Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:1860
+/// KeptBits also can't be 1, that would have been folded to  %x dstcond 0
+/// We will unfold it into the natual trunc+sext pattern:
+///   ((%x << C) a>> C) dstcond %x
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typo: natual


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Comment at: lib/Target/X86/X86ISelLowering.cpp:4801-4802
 
+bool X86TargetLowering::shouldTransformSignedTruncationCheck(
+    EVT XVT, unsigned KeptBits) const {
+  // For vectors, we don't have a preference..
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Any reason this is in the header file for AArch but in the cpp file for x86?


Repository:
  rL LLVM

https://reviews.llvm.org/D49266