[PATCH] D39704: [X86] [CodeGen] Compiler not using SHLD/SHRD instructions when doing double shift pattern combine for 16bit or 8bit arguments (PR35155)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 14 07:13:17 PDT 2018

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RKSimon added a comment.

@kbelochapka If you're still interested in SHLD/SHRD optimization you might want to keep an eye on https://reviews.llvm.org/D49242


https://reviews.llvm.org/D39704

Previous message: [PATCH] D46380: [InstSimplify] Adding safety checks for 'shl', 'ashr' and 'lshr'
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