[PATCH] D48374: [mips] Sign extend i32 return values on MIPS64

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: test/CodeGen/Mips/llvm-ir/or.ll:111
 ; GP64-NEXT:    jr $ra
-; GP64-NEXT:    sll $2, $1, 0
 ;
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smaksimovic wrote:
> For example here.
> What is happening is that the already extended arguments which are operands to the 32 bit OR enable the operation to be transformed to a 64 bit OR through series of combines done at SimplifyBinOpWithSameOpcodeHands in DAGCombiner.cpp.
> This in turn renders the sign_extend node introduced as a parent to the 64 bit OR unneeded so it gets removed, which leads to SLL instruction not being generated.
> 
> Likewise for the xor.ll test.
The sign extension here is redundant, I think: if `x` and `y` both have N sign bits, `x | y` also has N sign bits.


https://reviews.llvm.org/D48374