[PATCH] D49266: [X86][AArch64][DAGCombine] Unfold 'check for [no] signed truncation' pattern

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


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Comment at: test/CodeGen/X86/peep-test-4.ll:133
 
 define zeroext i1 @adc(i128 %x) nounwind {
 ; CHECK-LABEL: adc:
----------------
`i128`, Ok, so we want a TLI hook.
(No, don't think `isTypeLegal()` will work, it regresses some folds here.)


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Comment at: test/CodeGen/X86/setcc-logic.ll:425-438
 define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) nounwind {
 ; CHECK-LABEL: ne_neg1_and_ne_zero:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    incq %rdi
-; CHECK-NEXT:    cmpq $1, %rdi
-; CHECK-NEXT:    seta %al
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    cmpq %rdi, %rax
----------------
I'm not sure what is going on here yet..


Repository:
  rL LLVM

https://reviews.llvm.org/D49266