[PATCH] D48379: [mips] Mark standard encoded instructions as not being in MIPS16e

[Simon Atanasyan via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL336893: [mips] Mark standard encoded instructions as not being in MIPS16e (authored by atanasyan, committed by ).

Repository:
  rL LLVM

https://reviews.llvm.org/D48379

Files:
  llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
  llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td


Index: llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
+++ llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
@@ -3752,7 +3752,7 @@
 
 // Pseudoes used to implement transparent fp16 support.
 
-let Predicates = [HasMSA] in {
+let ASEPredicate = [HasMSA] in {
  def ST_F16 : MipsPseudo<(outs), (ins MSA128F16:$ws, mem_simm10:$addr),
                           [(store (f16 MSA128F16:$ws), (addrimm10:$addr))]> {
    let usesCustomInserter = 1;
Index: llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
+++ llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
@@ -120,7 +120,7 @@
 class InstSE<dag outs, dag ins, string asmstr, list<dag> pattern,
              InstrItinClass itin, Format f, string opstr = ""> :
   MipsInst<outs, ins, asmstr, pattern, itin, f> {
-  let EncodingPredicates = [HasStdEnc];
+  let EncodingPredicates = [NotInMips16Mode];
   string BaseOpcode = opstr;
   string Arch;
 }
@@ -137,7 +137,7 @@
 class PseudoSE<dag outs, dag ins, list<dag> pattern,
                InstrItinClass itin = IIPseudo> :
   MipsPseudo<outs, ins, pattern, itin> {
-  let EncodingPredicates = [HasStdEnc];
+  let EncodingPredicates = [NotInMips16Mode];
 }
 
 // Pseudo-instructions for alternate assembly syntax (never used by codegen).


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