[PATCH] D48936: [X86][SSE] Prefer BLEND(SHL(v, c1), SHL(v, c2)) over MUL(v, c3)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon updated this revision to Diff 154525.
RKSimon added a comment.

Still perform non-SHL shifts without PBLENDW / v4i32 widening


Repository:
  rL LLVM

https://reviews.llvm.org/D48936

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/combine-shl.ll
  test/CodeGen/X86/lower-vec-shift.ll
  test/CodeGen/X86/vec_shift6.ll
  test/CodeGen/X86/widen_arith-4.ll

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