[llvm] r336437 - [llvm-mca] A write latency cannot be a negative value. NFC

[Andrea Di Biagio via llvm-commits]

Author: adibiagio
Date: Fri Jul  6 06:46:10 2018
New Revision: 336437

URL: http://llvm.org/viewvc/llvm-project?rev=336437&view=rev
Log:
[llvm-mca] A write latency cannot be a negative value. NFC

Modified:
    llvm/trunk/tools/llvm-mca/InstrBuilder.cpp
    llvm/trunk/tools/llvm-mca/Instruction.cpp
    llvm/trunk/tools/llvm-mca/Instruction.h

Modified: llvm/trunk/tools/llvm-mca/InstrBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/InstrBuilder.cpp?rev=336437&r1=336436&r2=336437&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/InstrBuilder.cpp (original)
+++ llvm/trunk/tools/llvm-mca/InstrBuilder.cpp Fri Jul  6 06:46:10 2018
@@ -196,7 +196,8 @@ static void populateWrites(InstrDesc &ID
       const MCWriteLatencyEntry &WLE =
           *STI.getWriteLatencyEntry(&SCDesc, CurrentDef);
       // Conservatively default to MaxLatency.
-      Write.Latency = WLE.Cycles == -1 ? ID.MaxLatency : WLE.Cycles;
+      Write.Latency = WLE.Cycles < 0 ? ID.MaxLatency
+                                     : static_cast<unsigned>(WLE.Cycles);
       Write.SClassOrWriteResourceID = WLE.WriteResourceID;
     } else {
       // Assign a default latency for this write.
@@ -225,7 +226,8 @@ static void populateWrites(InstrDesc &ID
       const MCWriteLatencyEntry &WLE =
           *STI.getWriteLatencyEntry(&SCDesc, Index);
       // Conservatively default to MaxLatency.
-      Write.Latency = WLE.Cycles == -1 ? ID.MaxLatency : WLE.Cycles;
+      Write.Latency = WLE.Cycles < 0 ? ID.MaxLatency
+                                     : static_cast<unsigned>(WLE.Cycles);
       Write.SClassOrWriteResourceID = WLE.WriteResourceID;
     } else {
       // Assign a default latency for this write.

Modified: llvm/trunk/tools/llvm-mca/Instruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/Instruction.cpp?rev=336437&r1=336436&r2=336437&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/Instruction.cpp (original)
+++ llvm/trunk/tools/llvm-mca/Instruction.cpp Fri Jul  6 06:46:10 2018
@@ -41,7 +41,7 @@ void ReadState::writeStartEvent(unsigned
 void WriteState::onInstructionIssued() {
   assert(CyclesLeft == UNKNOWN_CYCLES);
   // Update the number of cycles left based on the WriteDescriptor info.
-  CyclesLeft = WD.Latency;
+  CyclesLeft = getLatency();
 
   // Now that the time left before write-back is known, notify
   // all the users.
@@ -93,7 +93,7 @@ void ReadState::cycleEvent() {
 
 #ifndef NDEBUG
 void WriteState::dump() const {
-  dbgs() << "{ OpIdx=" << WD.OpIndex << ", Lat=" << WD.Latency << ", RegID "
+  dbgs() << "{ OpIdx=" << WD.OpIndex << ", Lat=" << getLatency() << ", RegID "
          << getRegisterID() << ", Cycles Left=" << getCyclesLeft() << " }";
 }
 

Modified: llvm/trunk/tools/llvm-mca/Instruction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/Instruction.h?rev=336437&r1=336436&r2=336437&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/Instruction.h (original)
+++ llvm/trunk/tools/llvm-mca/Instruction.h Fri Jul  6 06:46:10 2018
@@ -28,11 +28,6 @@
 
 namespace mca {
 
-struct WriteDescriptor;
-struct ReadDescriptor;
-class WriteState;
-class ReadState;
-
 constexpr int UNKNOWN_CYCLES = -512;
 
 /// A register write descriptor.
@@ -42,7 +37,7 @@ struct WriteDescriptor {
   // a bitwise not of the OpIndex.
   int OpIndex;
   // Write latency. Number of cycles before write-back stage.
-  int Latency;
+  unsigned Latency;
   // This field is set to a value different than zero only if this
   // is an implicit definition.
   unsigned RegisterID;
@@ -81,6 +76,8 @@ struct ReadDescriptor {
   bool isImplicitRead() const { return OpIndex < 0; };
 };
 
+class ReadState;
+
 /// Tracks uses of a register definition (e.g. register write).
 ///
 /// Each implicit/explicit register write is associated with an instance of
@@ -123,6 +120,7 @@ public:
   int getCyclesLeft() const { return CyclesLeft; }
   unsigned getWriteResourceID() const { return WD.SClassOrWriteResourceID; }
   unsigned getRegisterID() const { return RegisterID; }
+  unsigned getLatency() const { return WD.Latency; }
 
   void addUser(ReadState *Use, int ReadAdvance);
   unsigned getNumUsers() const { return Users.size(); }