[PATCH] D48713: [llvm-exegesis] Add uop computation for more X87 instruction classes.

[Clement Courbet via Phabricator via llvm-commits]

courbet added a comment.

Thanks, PTAL.



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Comment at: tools/llvm-exegesis/lib/X86/Target.cpp:171
   static std::vector<llvm::MCInst>
   setVectorRegToConstant(const unsigned Reg, const unsigned RegSizeBytes,
                          const unsigned RMOpcode) {
----------------
gchatelet wrote:
> Reg and RegSizeBytes could theoretically be out of sync. Should RegSizeBytes be computed from Reg?
We could take that RegClass and do RegClass.MC.RegsSize, but is feels awkward.


Repository:
  rL LLVM

https://reviews.llvm.org/D48713