[llvm] r336317 - [AArch64][SVE] Asm: Support for signed/unsigned MIN/MAX/ABD
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 5 00:54:10 PDT 2018
Author: s.desmalen
Date: Thu Jul 5 00:54:10 2018
New Revision: 336317
URL: http://llvm.org/viewvc/llvm-project?rev=336317&view=rev
Log:
[AArch64][SVE] Asm: Support for signed/unsigned MIN/MAX/ABD
This patch implements the following varieties:
- Unpredicated signed max, e.g. smax z0.h, z1.h, #-128
- Unpredicated signed min, e.g. smin z0.h, z1.h, #-128
- Unpredicated unsigned max, e.g. umax z0.h, z1.h, #255
- Unpredicated unsigned min, e.g. umin z0.h, z1.h, #255
- Predicated signed max, e.g. smax z0.h, p0/m, z0.h, z1.h
- Predicated signed min, e.g. smin z0.h, p0/m, z0.h, z1.h
- Predicated signed abd, e.g. sabd z0.h, p0/m, z0.h, z1.h
- Predicated unsigned max, e.g. umax z0.h, p0/m, z0.h, z1.h
- Predicated unsigned min, e.g. umin z0.h, p0/m, z0.h, z1.h
- Predicated unsigned abd, e.g. uabd z0.h, p0/m, z0.h, z1.h
Added:
llvm/trunk/test/MC/AArch64/SVE/sabd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sabd.s
llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/smax.s
llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/smin.s
llvm/trunk/test/MC/AArch64/SVE/uabd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uabd.s
llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/umax.s
llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/umin.s
Modified:
llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td?rev=336317&r1=336316&r2=336317&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td Thu Jul 5 00:54:10 2018
@@ -262,6 +262,12 @@ def simm9 : Operand<i64>, ImmLeaf<i64, [
let DecoderMethod = "DecodeSImm<9>";
}
+def SImm8Operand : SImmOperand<8>;
+def simm8 : Operand<i64>, ImmLeaf<i64, [{ return Imm >= -128 && Imm < 127; }]> {
+ let ParserMatchClass = SImm8Operand;
+ let DecoderMethod = "DecodeSImm<8>";
+}
+
def SImm6Operand : SImmOperand<6>;
def simm6_32b : Operand<i32>, ImmLeaf<i32, [{ return Imm >= -32 && Imm < 32; }]> {
let ParserMatchClass = SImm6Operand;
Modified: llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td?rev=336317&r1=336316&r2=336317&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td Thu Jul 5 00:54:10 2018
@@ -52,6 +52,11 @@ let Predicates = [HasSVE] in {
defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon">;
defm AND_ZI : sve_int_log_imm<0b10, "and", "bic">;
+ defm SMAX_ZI : sve_int_arith_imm1<0b00, "smax", simm8>;
+ defm SMIN_ZI : sve_int_arith_imm1<0b10, "smin", simm8>;
+ defm UMAX_ZI : sve_int_arith_imm1<0b01, "umax", imm0_255>;
+ defm UMIN_ZI : sve_int_arith_imm1<0b11, "umin", imm0_255>;
+
defm SXTB_ZPmZ : sve_int_un_pred_arit_0_h<0b000, "sxtb">;
defm UXTB_ZPmZ : sve_int_un_pred_arit_0_h<0b001, "uxtb">;
defm SXTH_ZPmZ : sve_int_un_pred_arit_0_w<0b010, "sxth">;
@@ -61,6 +66,13 @@ let Predicates = [HasSVE] in {
defm ABS_ZPmZ : sve_int_un_pred_arit_0< 0b110, "abs">;
defm NEG_ZPmZ : sve_int_un_pred_arit_0< 0b111, "neg">;
+ defm SMAX_ZPmZ : sve_int_bin_pred_arit_1<0b000, "smax">;
+ defm UMAX_ZPmZ : sve_int_bin_pred_arit_1<0b001, "umax">;
+ defm SMIN_ZPmZ : sve_int_bin_pred_arit_1<0b010, "smin">;
+ defm UMIN_ZPmZ : sve_int_bin_pred_arit_1<0b011, "umin">;
+ defm SABD_ZPmZ : sve_int_bin_pred_arit_1<0b100, "sabd">;
+ defm UABD_ZPmZ : sve_int_bin_pred_arit_1<0b101, "uabd">;
+
defm FADD_ZPmI : sve_fp_2op_i_p_zds<0b000, "fadd", sve_fpimm_half_one>;
defm FMUL_ZPmI : sve_fp_2op_i_p_zds<0b010, "fmul", sve_fpimm_half_two>;
defm FMAX_ZPmI : sve_fp_2op_i_p_zds<0b110, "fmax", sve_fpimm_zero_one>;
Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=336317&r1=336316&r2=336317&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Thu Jul 5 00:54:10 2018
@@ -3915,6 +3915,8 @@ bool AArch64AsmParser::showMatchError(SM
return Error(Loc, "index must be a multiple of 16 in range [-128, 112].");
case Match_InvalidMemoryIndexed1SImm6:
return Error(Loc, "index must be an integer in range [-32, 31].");
+ case Match_InvalidMemoryIndexedSImm8:
+ return Error(Loc, "index must be an integer in range [-128, 127].");
case Match_InvalidMemoryIndexedSImm9:
return Error(Loc, "index must be an integer in range [-256, 255].");
case Match_InvalidMemoryIndexed8SImm10:
@@ -4563,6 +4565,7 @@ bool AArch64AsmParser::MatchAndEmitInstr
case Match_InvalidMemoryIndexed8UImm6:
case Match_InvalidMemoryIndexedSImm6:
case Match_InvalidMemoryIndexedSImm5:
+ case Match_InvalidMemoryIndexedSImm8:
case Match_InvalidMemoryIndexedSImm9:
case Match_InvalidMemoryIndexed8SImm10:
case Match_InvalidImm0_1:
Modified: llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td?rev=336317&r1=336316&r2=336317&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td Thu Jul 5 00:54:10 2018
@@ -1057,6 +1057,13 @@ multiclass sve_int_bin_pred_arit_0<bits<
def _D : sve_int_bin_pred_arit_log<0b11, 0b00, opc, asm, ZPR64>;
}
+multiclass sve_int_bin_pred_arit_1<bits<3> opc, string asm> {
+ def _B : sve_int_bin_pred_arit_log<0b00, 0b01, opc, asm, ZPR8>;
+ def _H : sve_int_bin_pred_arit_log<0b01, 0b01, opc, asm, ZPR16>;
+ def _S : sve_int_bin_pred_arit_log<0b10, 0b01, opc, asm, ZPR32>;
+ def _D : sve_int_bin_pred_arit_log<0b11, 0b01, opc, asm, ZPR64>;
+}
+
//===----------------------------------------------------------------------===//
// SVE Integer Arithmetic - Unary Predicated Group
//===----------------------------------------------------------------------===//
@@ -1207,6 +1214,31 @@ multiclass sve_int_arith_imm0<bits<3> op
def _D : sve_int_arith_imm0<0b11, opc, asm, ZPR64, addsub_imm8_opt_lsl_i64>;
}
+class sve_int_arith_imm1<bits<2> sz8_64, bits<2> opc, string asm,
+ ZPRRegOp zprty, Operand immtype>
+: I<(outs zprty:$Zdn), (ins zprty:$_Zdn, immtype:$imm),
+ asm, "\t$Zdn, $_Zdn, $imm",
+ "",
+ []>, Sched<[]> {
+ bits<5> Zdn;
+ bits<8> imm;
+ let Inst{31-24} = 0b00100101;
+ let Inst{23-22} = sz8_64;
+ let Inst{21-18} = 0b1010;
+ let Inst{17-16} = opc;
+ let Inst{15-13} = 0b110;
+ let Inst{12-5} = imm;
+ let Inst{4-0} = Zdn;
+
+ let Constraints = "$Zdn = $_Zdn";
+}
+
+multiclass sve_int_arith_imm1<bits<2> opc, string asm, Operand immtype> {
+ def _B : sve_int_arith_imm1<0b00, opc, asm, ZPR8, immtype>;
+ def _H : sve_int_arith_imm1<0b01, opc, asm, ZPR16, immtype>;
+ def _S : sve_int_arith_imm1<0b10, opc, asm, ZPR32, immtype>;
+ def _D : sve_int_arith_imm1<0b11, opc, asm, ZPR64, immtype>;
+}
//===----------------------------------------------------------------------===//
// SVE Bitwise Logical - Unpredicated Group
Added: llvm/trunk/test/MC/AArch64/SVE/sabd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sabd-diagnostics.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sabd-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/sabd-diagnostics.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,6 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+sabd z0.b, p8/m, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: sabd z0.b, p8/m, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/sabd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sabd.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sabd.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/sabd.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+sabd z31.b, p7/m, z31.b, z31.b
+// CHECK-INST: sabd z31.b, p7/m, z31.b, z31.b
+// CHECK-ENCODING: [0xff,0x1f,0x0c,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 0c 04 <unknown>
+
+sabd z31.h, p7/m, z31.h, z31.h
+// CHECK-INST: sabd z31.h, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xff,0x1f,0x4c,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 4c 04 <unknown>
+
+sabd z31.s, p7/m, z31.s, z31.s
+// CHECK-INST: sabd z31.s, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x1f,0x8c,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 8c 04 <unknown>
+
+sabd z31.d, p7/m, z31.d, z31.d
+// CHECK-INST: sabd z31.d, p7/m, z31.d, z31.d
+// CHECK-ENCODING: [0xff,0x1f,0xcc,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f cc 04 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,16 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+smax z0.b, z0.b, #-129
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-128, 127].
+// CHECK-NEXT: smax z0.b, z0.b, #-129
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smax z31.b, z31.b, #128
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-128, 127].
+// CHECK-NEXT: smax z31.b, z31.b, #128
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smax z0.b, p8/m, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: smax z0.b, p8/m, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/smax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smax.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smax.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/smax.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,80 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+smax z0.b, z0.b, #-128
+// CHECK-INST: smax z0.b, z0.b, #-128
+// CHECK-ENCODING: [0x00,0xd0,0x28,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 28 25 <unknown>
+
+smax z31.b, z31.b, #127
+// CHECK-INST: smax z31.b, z31.b, #127
+// CHECK-ENCODING: [0xff,0xcf,0x28,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf 28 25 <unknown>
+
+smax z0.h, z0.h, #-128
+// CHECK-INST: smax z0.h, z0.h, #-128
+// CHECK-ENCODING: [0x00,0xd0,0x68,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 68 25 <unknown>
+
+smax z31.h, z31.h, #127
+// CHECK-INST: smax z31.h, z31.h, #127
+// CHECK-ENCODING: [0xff,0xcf,0x68,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf 68 25 <unknown>
+
+smax z0.s, z0.s, #-128
+// CHECK-INST: smax z0.s, z0.s, #-128
+// CHECK-ENCODING: [0x00,0xd0,0xa8,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 a8 25 <unknown>
+
+smax z31.s, z31.s, #127
+// CHECK-INST: smax z31.s, z31.s, #127
+// CHECK-ENCODING: [0xff,0xcf,0xa8,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf a8 25 <unknown>
+
+smax z0.d, z0.d, #-128
+// CHECK-INST: smax z0.d, z0.d, #-128
+// CHECK-ENCODING: [0x00,0xd0,0xe8,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 e8 25 <unknown>
+
+smax z31.d, z31.d, #127
+// CHECK-INST: smax z31.d, z31.d, #127
+// CHECK-ENCODING: [0xff,0xcf,0xe8,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf e8 25 <unknown>
+
+smax z31.b, p7/m, z31.b, z31.b
+// CHECK-INST: smax z31.b, p7/m, z31.b, z31.b
+// CHECK-ENCODING: [0xff,0x1f,0x08,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 08 04 <unknown>
+
+smax z31.h, p7/m, z31.h, z31.h
+// CHECK-INST: smax z31.h, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xff,0x1f,0x48,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 48 04 <unknown>
+
+smax z31.s, p7/m, z31.s, z31.s
+// CHECK-INST: smax z31.s, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x1f,0x88,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 88 04 <unknown>
+
+smax z31.d, p7/m, z31.d, z31.d
+// CHECK-INST: smax z31.d, p7/m, z31.d, z31.d
+// CHECK-ENCODING: [0xff,0x1f,0xc8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f c8 04 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,16 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+smin z0.b, z0.b, #-129
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-128, 127].
+// CHECK-NEXT: smin z0.b, z0.b, #-129
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smin z31.b, z31.b, #128
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-128, 127].
+// CHECK-NEXT: smin z31.b, z31.b, #128
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+smin z0.b, p8/m, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: smin z0.b, p8/m, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/smin.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smin.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smin.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/smin.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,80 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+smin z0.b, z0.b, #-128
+// CHECK-INST: smin z0.b, z0.b, #-128
+// CHECK-ENCODING: [0x00,0xd0,0x2a,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 2a 25 <unknown>
+
+smin z31.b, z31.b, #127
+// CHECK-INST: smin z31.b, z31.b, #127
+// CHECK-ENCODING: [0xff,0xcf,0x2a,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf 2a 25 <unknown>
+
+smin z0.h, z0.h, #-128
+// CHECK-INST: smin z0.h, z0.h, #-128
+// CHECK-ENCODING: [0x00,0xd0,0x6a,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 6a 25 <unknown>
+
+smin z31.h, z31.h, #127
+// CHECK-INST: smin z31.h, z31.h, #127
+// CHECK-ENCODING: [0xff,0xcf,0x6a,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf 6a 25 <unknown>
+
+smin z0.s, z0.s, #-128
+// CHECK-INST: smin z0.s, z0.s, #-128
+// CHECK-ENCODING: [0x00,0xd0,0xaa,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 aa 25 <unknown>
+
+smin z31.s, z31.s, #127
+// CHECK-INST: smin z31.s, z31.s, #127
+// CHECK-ENCODING: [0xff,0xcf,0xaa,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf aa 25 <unknown>
+
+smin z0.d, z0.d, #-128
+// CHECK-INST: smin z0.d, z0.d, #-128
+// CHECK-ENCODING: [0x00,0xd0,0xea,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 d0 ea 25 <unknown>
+
+smin z31.d, z31.d, #127
+// CHECK-INST: smin z31.d, z31.d, #127
+// CHECK-ENCODING: [0xff,0xcf,0xea,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf ea 25 <unknown>
+
+smin z31.b, p7/m, z31.b, z31.b
+// CHECK-INST: smin z31.b, p7/m, z31.b, z31.b
+// CHECK-ENCODING: [0xff,0x1f,0x0a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 0a 04 <unknown>
+
+smin z31.h, p7/m, z31.h, z31.h
+// CHECK-INST: smin z31.h, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xff,0x1f,0x4a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 4a 04 <unknown>
+
+smin z31.s, p7/m, z31.s, z31.s
+// CHECK-INST: smin z31.s, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x1f,0x8a,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 8a 04 <unknown>
+
+smin z31.d, p7/m, z31.d, z31.d
+// CHECK-INST: smin z31.d, p7/m, z31.d, z31.d
+// CHECK-ENCODING: [0xff,0x1f,0xca,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f ca 04 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/uabd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uabd-diagnostics.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uabd-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/uabd-diagnostics.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,6 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+uabd z0.b, p8/m, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: uabd z0.b, p8/m, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/uabd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uabd.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uabd.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/uabd.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+uabd z31.b, p7/m, z31.b, z31.b
+// CHECK-INST: uabd z31.b, p7/m, z31.b, z31.b
+// CHECK-ENCODING: [0xff,0x1f,0x0d,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 0d 04 <unknown>
+
+uabd z31.h, p7/m, z31.h, z31.h
+// CHECK-INST: uabd z31.h, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xff,0x1f,0x4d,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 4d 04 <unknown>
+
+uabd z31.s, p7/m, z31.s, z31.s
+// CHECK-INST: uabd z31.s, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x1f,0x8d,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 8d 04 <unknown>
+
+uabd z31.d, p7/m, z31.d, z31.d
+// CHECK-INST: uabd z31.d, p7/m, z31.d, z31.d
+// CHECK-ENCODING: [0xff,0x1f,0xcd,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f cd 04 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,16 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+umax z0.b, z0.b, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255].
+// CHECK-NEXT: umax z0.b, z0.b, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umax z31.b, z31.b, #256
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255].
+// CHECK-NEXT: umax z31.b, z31.b, #256
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umax z0.b, p8/m, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: umax z0.b, p8/m, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/umax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umax.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umax.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/umax.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,80 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+umax z0.b, z0.b, #0
+// CHECK-INST: umax z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 29 25 <unknown>
+
+umax z31.b, z31.b, #255
+// CHECK-INST: umax z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 29 25 <unknown>
+
+umax z0.b, z0.b, #0
+// CHECK-INST: umax z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 29 25 <unknown>
+
+umax z31.b, z31.b, #255
+// CHECK-INST: umax z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 29 25 <unknown>
+
+umax z0.b, z0.b, #0
+// CHECK-INST: umax z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 29 25 <unknown>
+
+umax z31.b, z31.b, #255
+// CHECK-INST: umax z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 29 25 <unknown>
+
+umax z0.b, z0.b, #0
+// CHECK-INST: umax z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 29 25 <unknown>
+
+umax z31.b, z31.b, #255
+// CHECK-INST: umax z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 29 25 <unknown>
+
+umax z31.b, p7/m, z31.b, z31.b
+// CHECK-INST: umax z31.b, p7/m, z31.b, z31.b
+// CHECK-ENCODING: [0xff,0x1f,0x09,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 09 04 <unknown>
+
+umax z31.h, p7/m, z31.h, z31.h
+// CHECK-INST: umax z31.h, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xff,0x1f,0x49,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 49 04 <unknown>
+
+umax z31.s, p7/m, z31.s, z31.s
+// CHECK-INST: umax z31.s, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x1f,0x89,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 89 04 <unknown>
+
+umax z31.d, p7/m, z31.d, z31.d
+// CHECK-INST: umax z31.d, p7/m, z31.d, z31.d
+// CHECK-ENCODING: [0xff,0x1f,0xc9,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f c9 04 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,16 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+umin z0.b, z0.b, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255].
+// CHECK-NEXT: umin z0.b, z0.b, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umin z31.b, z31.b, #256
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255].
+// CHECK-NEXT: umin z31.b, z31.b, #256
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+umin z0.b, p8/m, z0.b, z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: umin z0.b, p8/m, z0.b, z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/umin.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umin.s?rev=336317&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umin.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/umin.s Thu Jul 5 00:54:10 2018
@@ -0,0 +1,80 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+umin z0.b, z0.b, #0
+// CHECK-INST: umin z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 2b 25 <unknown>
+
+umin z31.b, z31.b, #255
+// CHECK-INST: umin z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 2b 25 <unknown>
+
+umin z0.b, z0.b, #0
+// CHECK-INST: umin z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 2b 25 <unknown>
+
+umin z31.b, z31.b, #255
+// CHECK-INST: umin z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 2b 25 <unknown>
+
+umin z0.b, z0.b, #0
+// CHECK-INST: umin z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 2b 25 <unknown>
+
+umin z31.b, z31.b, #255
+// CHECK-INST: umin z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 2b 25 <unknown>
+
+umin z0.b, z0.b, #0
+// CHECK-INST: umin z0.b, z0.b, #0
+// CHECK-ENCODING: [0x00,0xc0,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 2b 25 <unknown>
+
+umin z31.b, z31.b, #255
+// CHECK-INST: umin z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 2b 25 <unknown>
+
+umin z31.b, p7/m, z31.b, z31.b
+// CHECK-INST: umin z31.b, p7/m, z31.b, z31.b
+// CHECK-ENCODING: [0xff,0x1f,0x0b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 0b 04 <unknown>
+
+umin z31.h, p7/m, z31.h, z31.h
+// CHECK-INST: umin z31.h, p7/m, z31.h, z31.h
+// CHECK-ENCODING: [0xff,0x1f,0x4b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 4b 04 <unknown>
+
+umin z31.s, p7/m, z31.s, z31.s
+// CHECK-INST: umin z31.s, p7/m, z31.s, z31.s
+// CHECK-ENCODING: [0xff,0x1f,0x8b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f 8b 04 <unknown>
+
+umin z31.d, p7/m, z31.d, z31.d
+// CHECK-INST: umin z31.d, p7/m, z31.d, z31.d
+// CHECK-ENCODING: [0xff,0x1f,0xcb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 1f cb 04 <unknown>
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