[PATCH] D48308: [Power9] Ensure float128 in non-homogenous aggregates are passed via VSX registers

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

Other than a few cosmetic changes, LGTM.



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Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:7662
+  if (!EnableQuadPrecision ||
+      (Op->getValueType(0) != MVT::f128 ) ||
+      (Op->getOperand(0).getOpcode() != ISD::BUILD_PAIR) ||
----------------
A `bitcast` produces a single result, why `getValueType(0)` vs. just `getValueType()`?


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Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:7668
+
+  SDValue Op0 = Op->getOperand(0);
+  SDValue Val = DAG.getNode(PPCISD::BUILD_FP128, dl, MVT::f128,
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There are 3 more uses of this for the `if` statement above, why not define it up there and use it in the condition as well?


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Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:7669
+  SDValue Op0 = Op->getOperand(0);
+  SDValue Val = DAG.getNode(PPCISD::BUILD_FP128, dl, MVT::f128,
+                            Op0.getOperand(0), Op0.getOperand(1));
----------------
No need for this temp. Just return the result of `getNode()`.


https://reviews.llvm.org/D48308