[llvm] r336209 - [AArch64][GlobalISel] Fix fallbacks introduced in r336120 due to unselectable stores.

Amara Emerson via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 3 08:59:26 PDT 2018


Author: aemerson
Date: Tue Jul  3 08:59:26 2018
New Revision: 336209

URL: http://llvm.org/viewvc/llvm-project?rev=336209&view=rev
Log:
[AArch64][GlobalISel] Fix fallbacks introduced in r336120 due to unselectable stores.

r336120 resulted in falling back to SelectionDAG more often due to the G_STORE
MMOs not matching the vreg size. This fixes that by explicitly any-extending the
value.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp?rev=336209&r1=336208&r2=336209&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp Tue Jul  3 08:59:26 2018
@@ -155,9 +155,12 @@ struct OutgoingArgHandler : public CallL
 
   void assignValueToAddress(unsigned ValVReg, unsigned Addr, uint64_t Size,
                             MachinePointerInfo &MPO, CCValAssign &VA) override {
-    if (VA.getLocInfo() == CCValAssign::LocInfo::AExt)
+    if (VA.getLocInfo() == CCValAssign::LocInfo::AExt) {
       Size = VA.getLocVT().getSizeInBits() / 8;
-
+      ValVReg = MIRBuilder.buildAnyExt(LLT::scalar(Size * 8), ValVReg)
+                    ->getOperand(0)
+                    .getReg();
+    }
     auto MMO = MIRBuilder.getMF().getMachineMemOperand(
         MPO, MachineMemOperand::MOStore, Size, 0);
     MIRBuilder.buildStore(ValVReg, Addr, *MMO);

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll?rev=336209&r1=336208&r2=336209&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll Tue Jul  3 08:59:26 2018
@@ -16,9 +16,12 @@ target triple = "aarch64-apple-ios9.0"
 ; CHECK: $w0 = COPY [[ANSWER]]
 ; CHECK: $d0 = COPY [[D_ONE]]
 ; CHECK: $x1 = COPY [[TWELVE]]
-; CHECK: G_STORE [[THREE]](s8), {{%[0-9]+}}(p0) :: (store 8 into stack, align 0)
-; CHECK: G_STORE [[ONE]](s16), {{%[0-9]+}}(p0) :: (store 8 into stack + 8, align 0)
-; CHECK: G_STORE [[FOUR]](s32), {{%[0-9]+}}(p0) :: (store 8 into stack + 16, align 0)
+; CHECK: [[THREE_EXT:%[0-9]+]]:_(s64) = G_ANYEXT [[THREE]]
+; CHECK: G_STORE [[THREE_EXT]](s64), {{%[0-9]+}}(p0) :: (store 8 into stack, align 0)
+; CHECK: [[ONE_EXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ONE]]
+; CHECK: G_STORE [[ONE_EXT]](s64), {{%[0-9]+}}(p0) :: (store 8 into stack + 8, align 0)
+; CHECK: [[FOUR_EXT:%[0-9]+]]:_(s64) = G_ANYEXT [[FOUR]]
+; CHECK: G_STORE [[FOUR_EXT]](s64), {{%[0-9]+}}(p0) :: (store 8 into stack + 16, align 0)
 ; CHECK: G_STORE [[F_ONE]](s32), {{%[0-9]+}}(p0) :: (store 4 into stack + 24, align 0)
 ; CHECK: G_STORE [[TWO]](s64), {{%[0-9]+}}(p0) :: (store 8 into stack + 32, align 0)
 declare void @varargs(i32, double, i64, ...)

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll?rev=336209&r1=336208&r2=336209&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll Tue Jul  3 08:59:26 2018
@@ -74,7 +74,8 @@ continue:
 ; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY $sp
 ; CHECK: [[OFFSET:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
 ; CHECK: [[SLOT:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[OFFSET]](s64)
-; CHECK: G_STORE [[ANSWER]](s32), [[SLOT]]
+; CHECK: [[ANSWER_EXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ANSWER]]
+; CHECK: G_STORE [[ANSWER_EXT]](s64), [[SLOT]]
 
 ; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY $sp
 ; CHECK: [[OFFSET:%[0-9]+]]:_(s64) = G_CONSTANT i64 8




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