[PATCH] D48826: [AMDGPU] Add support for TFE/LWE in image intrinsics

[David Stuttard via Phabricator via llvm-commits]

dstuttard created this revision.
Herald added subscribers: llvm-commits, t-tye, tpr, yaxunl, mgorny, nhaehnle, wdng, kzhuravl, arsenm.

TFE and LWE support requires extra result registers that are written in the
event of a failure in order to detect that failure case.
The specific use-case that initiated these changes is sparse texture support.

This means that if image intrinsics are used with either option turned on, the
programmer must ensure that the return type can contain all of the expected
results. This can result in redundant registers since the vector size must be a
power-of-2.

This change takes roughly 5 parts:

1. Modify the instruction defs in tablegen to add new instruction variants that

can accomodate the extra return values.

2. Updates to lowerImage in SIISelLowering.cpp to accomodate setting TFE or LWE

(where the bulk of the work for these instruction types is now done)

3. Extra verification code to catch cases where intrinsics have been used but

insufficient return registers are used.

4. Modification to the adjustWritemask optimisation to account for TFE/LWE being

enabled (requires extra registers to be maintained for error return value).

5. An extra pass to zero initialize the error value return - this is because if

the error does not occur, the register is not written and thus must be zeroed
before use. Also added a new (on by default) option to ensure ALL return values
are zero-initialized that is required for sparse texture support.

Tests have been added/modified to test the new behaviour.


Repository:
  rL LLVM

https://reviews.llvm.org/D48826

Files:
  lib/Target/AMDGPU/AMDGPU.h
  lib/Target/AMDGPU/AMDGPU.td
  lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  lib/Target/AMDGPU/AMDGPUSubtarget.h
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/CMakeLists.txt
  lib/Target/AMDGPU/MIMGInstructions.td
  lib/Target/AMDGPU/SIAddIMGInit.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D48826.153696.patch
Type: text/x-patch
Size: 60536 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180702/93ae0825/attachment-0001.bin>