[PATCH] D48789: [X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 29 15:32:08 PDT 2018


craig.topper updated this revision to Diff 153592.
craig.topper added a reviewer: niravd.
craig.topper added a comment.

Place the new nodes before the original shift amount in the topological order of the DAG. This ensures that all shifts that had the same shift amount will be selected and run this transform before any of the new nodes are selected. The selection DAG should CSE all the new nodes together for multiple shifts.


https://reviews.llvm.org/D48789

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  test/CodeGen/X86/extract-lowbits.ll
  test/CodeGen/X86/schedule-x86-64-shld.ll

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