[PATCH] D45806: DAGcombiner: Handle correctly non-splat power of 2 -1 divisor

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 27 11:29:40 PDT 2018


efriedma added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3047
   SmallBitVector KnownNegatives(
       (N1C || !VT.isVector()) ? 1 : VT.getVectorNumElements(), false);
   auto IsPowerOfTwo = [](ConstantSDNode *C) {
----------------
Not really relevant to this review, but I think KnownNegatives is dead.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3104
                         Res);
+    // Special Case: (sdiv X, -1) -> 0-X
+    SDValue AllOnes = DAG.getAllOnesConstant(DL, VT);
----------------
Instead of separate special cases for 1 and -1, could you move the special case for 1 before the result is negated?  Would probably result in a little less code for vectors like <1, -1, 2, -2>


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3108
+                        DAG.getNode(ISD::SUB, DL, VT, Zero, N0), Res);
+    // TODO Special Case: (sdiv X, MIN_SIGNED) -> SELECT(X == MIN_SIGNED, 1, 0)
     return Res;
----------------
I'm not sure you actually need a special case for MIN_SIGNED; I think r335720 solved the issue.


Repository:
  rL LLVM

https://reviews.llvm.org/D45806





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