[llvm] r335597 - [InstCombine] fold udiv with sext bool divisor

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Tue Jun 26 05:41:15 2018
New Revision: 335597

URL: http://llvm.org/viewvc/llvm-project?rev=335597&view=rev
Log:
[InstCombine] fold udiv with sext bool divisor

Note: I didn't add a hasOneUse() check because the existing,
related fold doesn't have that check. I suspect that the
improved analysis and codegen make these some of the rare
canonicalization cases where we allow an increase in
instructions.


Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
    llvm/trunk/test/Transforms/InstCombine/div.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp?rev=335597&r1=335596&r2=335597&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp Tue Jun 26 05:41:15 2018
@@ -954,9 +954,15 @@ Instruction *InstCombiner::visitUDiv(Bin
 
   // Op0 / C where C is large (negative) --> zext (Op0 >= C)
   // TODO: Could use isKnownNegative() to handle non-constant values.
+  Type *Ty = I.getType();
   if (match(Op1, m_Negative())) {
     Value *Cmp = Builder.CreateICmpUGE(Op0, Op1);
-    return CastInst::CreateZExtOrBitCast(Cmp, I.getType());
+    return CastInst::CreateZExtOrBitCast(Cmp, Ty);
+  }
+  // Op0 / (sext i1 X) --> zext (Op0 == -1) (if X is 0, the div is undefined)
+  if (match(Op1, m_SExt(m_Value(X))) && X->getType()->isIntOrIntVectorTy(1)) {
+    Value *Cmp = Builder.CreateICmpEQ(Op0, ConstantInt::getAllOnesValue(Ty));
+    return CastInst::CreateZExtOrBitCast(Cmp, Ty);
   }
 
   if (Instruction *NarrowDiv = narrowUDivURem(I, Builder))

Modified: llvm/trunk/test/Transforms/InstCombine/div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/div.ll?rev=335597&r1=335596&r2=335597&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/div.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/div.ll Tue Jun 26 05:41:15 2018
@@ -98,8 +98,8 @@ define <2 x i64> @udiv_by_minus1_vec(<2
 
 define i32 @udiv_by_sext_all_ones(i1 %x, i32 %y) {
 ; CHECK-LABEL: @udiv_by_sext_all_ones(
-; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[X:%.*]] to i32
-; CHECK-NEXT:    [[DIV:%.*]] = udiv i32 [[Y:%.*]], [[SEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[Y:%.*]], -1
+; CHECK-NEXT:    [[DIV:%.*]] = zext i1 [[TMP1]] to i32
 ; CHECK-NEXT:    ret i32 [[DIV]]
 ;
   %sext = sext i1 %x to i32
@@ -109,8 +109,8 @@ define i32 @udiv_by_sext_all_ones(i1 %x,
 
 define <2 x i32> @udiv_by_sext_all_ones_vec(<2 x i1> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @udiv_by_sext_all_ones_vec(
-; CHECK-NEXT:    [[SEXT:%.*]] = sext <2 x i1> [[X:%.*]] to <2 x i32>
-; CHECK-NEXT:    [[DIV:%.*]] = udiv <2 x i32> [[Y:%.*]], [[SEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <2 x i32> [[Y:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT:    [[DIV:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32>
 ; CHECK-NEXT:    ret <2 x i32> [[DIV]]
 ;
   %sext = sext <2 x i1> %x to <2 x i32>