[PATCH] D48401: [InstCombine] fold vector select of binops with constant ops to 1 binop (PR37806)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri accepted this revision.
lebedev.ri added a comment.
This revision is now accepted and ready to land.

This doesn't look immediately broken to me,
but you probably want to wait a bit for more definitive review.



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Comment at: test/Transforms/InstCombine/shuffle_select.ll:160-199
 ; Div/rem need special handling if the shuffle has undef elements.
 
 define <4 x i32> @sdiv(<4 x i32> %v0) {
 ; CHECK-LABEL: @sdiv(
-; CHECK-NEXT:    [[T1:%.*]] = sdiv <4 x i32> [[V0:%.*]], <i32 1, i32 2, i32 3, i32 4>
-; CHECK-NEXT:    [[T2:%.*]] = sdiv <4 x i32> [[V0]], <i32 5, i32 6, i32 7, i32 8>
-; CHECK-NEXT:    [[T3:%.*]] = shufflevector <4 x i32> [[T1]], <4 x i32> [[T2]], <4 x i32> <i32 undef, i32 1, i32 6, i32 undef>
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Oh, somehow i did not notice this..
No `udiv`+`undef` test it seems though.


https://reviews.llvm.org/D48401