[llvm] r335122 - [mips] Fix the predicates of some DSP instructions from AdditionalPredicates to ASEPredicate

[Simon Dardis via llvm-commits]

Author: sdardis
Date: Wed Jun 20 06:29:57 2018
New Revision: 335122

URL: http://llvm.org/viewvc/llvm-project?rev=335122&view=rev
Log:
[mips] Fix the predicates of some DSP instructions from AdditionalPredicates to ASEPredicate

Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D48166

Modified:
    llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrFormats.td
    llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrInfo.td
    llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrFormats.td?rev=335122&r1=335121&r2=335122&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrFormats.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrFormats.td Wed Jun 20 06:29:57 2018
@@ -10,7 +10,7 @@
 class MMDSPInst<string opstr = "">
     : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
   let ASEPredicate = [HasDSP];
-  let AdditionalPredicates = [InMicroMips];
+  let EncodingPredicates = [InMicroMips];
   string BaseOpcode = opstr;
   string Arch = "mmdsp";
   let DecoderNamespace = "MicroMips";

Modified: llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrInfo.td?rev=335122&r1=335121&r2=335122&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsDSPInstrInfo.td Wed Jun 20 06:29:57 2018
@@ -417,11 +417,11 @@ class BPOSGE32_MM_DESC : BPOSGE32_DESC_B
                                             NoItinerary>;
 
 let DecoderNamespace = "MicroMipsDSP", Arch = "mmdsp",
-    AdditionalPredicates = [HasDSP, InMicroMips] in {
-    def LWDSP_MM : Load<"lw", DSPROpnd, null_frag, II_LW>, DspMMRel,
-                   LW_FM_MM<0x3f>;
-    def SWDSP_MM : Store<"sw", DSPROpnd, null_frag, II_SW>, DspMMRel,
-                   LW_FM_MM<0x3e>;
+    EncodingPredicates = [InMicroMips], ASEPredicate = [HasDSP] in {
+  def LWDSP_MM : Load<"lw", DSPROpnd, null_frag, II_LW>, DspMMRel,
+                 LW_FM_MM<0x3f>;
+  def SWDSP_MM : Store<"sw", DSPROpnd, null_frag, II_SW>, DspMMRel,
+                 LW_FM_MM<0x3e>;
 }
 // Instruction defs.
 // microMIPS DSP Rev 1
@@ -531,7 +531,7 @@ def MODSUB_MM : DspMMRel, MODSUB_MM_ENC,
 def MULSAQ_S_W_PH_MM : DspMMRel, MULSAQ_S_W_PH_MM_ENC, MULSAQ_S_W_PH_DESC;
 def BITREV_MM : DspMMRel, BITREV_MM_ENC, BITREV_MM_DESC;
 def BPOSGE32_MM : DspMMRel, BPOSGE32_MM_ENC, BPOSGE32_MM_DESC,
-                  ISA_MIPS1_NOT_32R6_64R6;
+                  ISA_MICROMIPS32_NOT_MIPS32R6;
 def CMP_EQ_PH_MM : DspMMRel, CMP_EQ_PH_MM_ENC, CMP_EQ_PH_DESC;
 def CMP_LT_PH_MM : DspMMRel, CMP_LT_PH_MM_ENC, CMP_LT_PH_DESC;
 def CMP_LE_PH_MM : DspMMRel, CMP_LE_PH_MM_ENC, CMP_LE_PH_DESC;

Modified: llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td?rev=335122&r1=335121&r2=335122&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td Wed Jun 20 06:29:57 2018
@@ -1289,7 +1289,7 @@ let isPseudo = 1, isCodeGenOnly = 1, has
 }
 
 let DecoderNamespace = "MipsDSP", Arch = "dsp",
-    AdditionalPredicates = [HasDSP] in {
+    ASEPredicate = [HasDSP] in {
   def LWDSP : Load<"lw", DSPROpnd, null_frag, II_LW>, DspMMRel, LW_FM<0x23>;
   def SWDSP : Store<"sw", DSPROpnd, null_frag, II_SW>, DspMMRel, LW_FM<0x2b>;
 }