[PATCH] D48225: [llvm-mca][X86] Teach how to identify register writes that implicitly clear the upper portion of a super-register.

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb added a comment.

In https://reviews.llvm.org/D48225#1136793, @craig.topper wrote:

> So as it is now, writing a VR128X with XOP will zero [511:256] and [255:128], but writing VR256X with xop won't?


I see what you mean. I don't want to complicate the API (especially since there is no cpu with XOP and AVX512f). What if I treat XOP the same as AVX then? In practice, this won't make any difference.


https://reviews.llvm.org/D48225