[PATCH] D48223: DAG combine "and|or (select c, -1, 0), x" -> "select c, x, 0|-1"

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 16 01:37:52 PDT 2018


rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: test/CodeGen/X86/dagcombine-select.ll:3-17
+; CHECK-LABEL: {{^}}select_and1:
+; CHECK:      cmpl    $11, %edi
+; CHECK-NEXT: cmovgel %esi, %eax
+; CHECK-NEXT: retq
+define i32 @select_and1(i32 %x, i32 %y) {
+  %c = icmp slt i32 %x, 11
+  %s = select i1 %c, i32 0, i32 -1
----------------
lebedev.ri wrote:
> Hm, is there some omitted instruction, or is this actually better than what we currently normally do?
> https://godbolt.org/g/7ULPfH
Yes. I have updated the test to contain the full ISA. First xor to zero out eax was omitted.
I am not sure what compiler explorer does, but that is what trunk llc has produced:


```
        xorl    %eax, %eax
        cmpl    $11, %edi
        setl    %al
        decl    %eax
        andl    %esi, %eax
        retq

```

I assume difference comes from running or not running opt.


https://reviews.llvm.org/D48223





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