[PATCH] D48170: ARM: use "add" instead of "orr" for code size

[Tim Northover via Phabricator via llvm-commits]

t.p.northover added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMInstrThumb.td:1016
+
+  def : Pat<(or AddLikeOrOp:$Rn, non_imm32:$Rm), (tADDrr $Rn, $Rm)>;
+}
----------------
efriedma wrote:
> T1Pat?
> 
> Are you intentionally avoiding transforming `x|256`?
> T1Pat?

That seems to require "IsThumb1Only", which I don't want.

> Are you intentionally avoiding transforming `x|256`?

Yes. That would result in a `MOV`/`ADD` pair (with restricted register classes). With this patch we get `ORR.W` with an immediate, which is probably better all round.

It's a bit of a heuristic, and not optimal when both `ADD` and `ORR` require a separate immediate. But by that point the only benefit is whether the destination register is tied so I decided to draw the line before that point in my initial patch.


Repository:
  rL LLVM

https://reviews.llvm.org/D48170