[llvm] r334478 - [X86] Update folding table generator to properly detect RMW arithmetic instructions.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Tue Jun 12 00:32:15 2018
New Revision: 334478

URL: http://llvm.org/viewvc/llvm-project?rev=334478&view=rev
Log:
[X86] Update folding table generator to properly detect RMW arithmetic instructions.

The RMW instructions are detected by reading the SchedRW data, but the RMW instructions have had their SchedRW changed in recent months. This broke the expectation.

We probably should fix this to use the mayLoad/mayStore flags if possible.

Modified:
    llvm/trunk/utils/TableGen/X86FoldTablesEmitter.cpp

Modified: llvm/trunk/utils/TableGen/X86FoldTablesEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86FoldTablesEmitter.cpp?rev=334478&r1=334477&r2=334478&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86FoldTablesEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/X86FoldTablesEmitter.cpp Tue Jun 12 00:32:15 2018
@@ -517,8 +517,10 @@ void X86FoldTablesEmitter::updateTables(
 
   // Instructions which have the WriteRMW value (Read-Modify-Write) should be
   // added to Table2Addr.
-  if (hasDefInList(MemRec, "SchedRW", "WriteRMW") && MemOutSize != RegOutSize &&
-      MemInSize == RegInSize) {
+  if ((hasDefInList(MemRec, "SchedRW", "WriteRMW") ||
+       hasDefInList(MemRec, "SchedRW", "WriteADCRMW") ||
+       hasDefInList(MemRec, "SchedRW", "WriteALURMW")) &&
+       MemOutSize != RegOutSize && MemInSize == RegInSize) {
     addEntryWithFlags(Table2Addr, RegInstr, MemInstr, S, 0);
     return;
   }