[PATCH] D47655: [MachineOutliner] Don't outline sequences where x16/x17/nzcv are live across

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 11 16:42:18 PDT 2018


efriedma added a comment.

We should probably use this functionality to allow outlining instructions which access/modify SP, in cases where we don't need to spill LR.  But that's probably better to do as a followup; it could have some unexpected effects on the heuristics.



================
Comment at: include/llvm/CodeGen/MachineOutliner.h:170
+    std::for_each((MachineBasicBlock::reverse_iterator)front(), MBB->rend(),
+                  [this](MachineInstr &MI) { LRUIn.stepBackward(MI); });
+  }
----------------
This could get expensive with a long basic block; I guess we can try to add some sort of cache later if it becomes an issue.


================
Comment at: lib/Target/AArch64/AArch64InstrInfo.cpp:4977
+
+    if (!LRUIn.available(AArch64::W17) || !LRUOut.available(AArch64::W17))
+      return true;
----------------
We don't care if it's live out: we can ignore the ABI rules because we know the exact destination of the "bx lr".

We could save/restore x16/x17 in theory, instead of giving up, but probably not worth implementing.


================
Comment at: lib/Target/AArch64/AArch64InstrInfo.cpp:5022
+                       [](outliner::Candidate &C) {
+                         return C.LRUOut.available(AArch64::LR);
+                         })) {
----------------
I guess there isn't any practical difference between LRUOut and LRUIn here because we don't outline instructions other than calls which read/write LR?


https://reviews.llvm.org/D47655





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