[PATCH] D47587: [RISCV] Codegen support for atomic operations on RV32I

[Alex Bradbury via Phabricator via llvm-commits]

asb updated this revision to Diff 150479.
asb added a comment.

Update to use fence.tso for fence acq_rel.


https://reviews.llvm.org/D47587

Files:
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVInstrInfo.td
  lib/Target/RISCV/RISCVTargetMachine.cpp
  test/CodeGen/RISCV/atomic-cmpxchg.ll
  test/CodeGen/RISCV/atomic-fence.ll
  test/CodeGen/RISCV/atomic-load-store.ll
  test/CodeGen/RISCV/atomic-rmw.ll

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