[PATCH] D47791: Initial support for Hexagon target.

Sid Manning via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 5 11:05:24 PDT 2018


sidneym created this revision.
sidneym added reviewers: ruiu, shankar.easwaran, kparzysz, bcahoon.
sidneym added a project: lld.
Herald added subscribers: MaskRay, arichardson, mgorny, emaste.
Herald added a reviewer: espindola.

Support B22_PCREL relocation along with a simple test.

I'm also working on a llvmSupport patch that will detail the instruction set encoding.  Many of Hexagon's instructions have immediates that are peppered throughout the word makeing application of fixups tedious since the same relocation fixup may need to be placed in different bits depending on the instruction.  That change will be made in llvmSupport so that both lld and llvm-rtdyld can share encoding information.


Repository:
  rLLD LLVM Linker

https://reviews.llvm.org/D47791

Files:
  ELF/Arch/Hexagon.cpp
  ELF/CMakeLists.txt
  ELF/Target.cpp
  ELF/Target.h
  test/ELF/Inputs/hexagon.s
  test/ELF/hexagon.s
  test/lit.cfg.py

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