[PATCH] D47725: [SelectionDAG] Provide default expansion for rotates

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 5 07:29:33 PDT 2018


RKSimon added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3923
+    //   (rotl x, c) -> (or (shl x, (and c, w-1)), (srl x, (and -c, w-1)))
+    //   (rotr x, c) -> (or (srl x, (and c, w-1)), (shl x, (and -c, w-1)))
+    //
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Is there any way that we can get here with a bit width that isn't power-of-two? In which case we'd have to adjust this and use UREM not AND........


Repository:
  rL LLVM

https://reviews.llvm.org/D47725





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