[PATCH] D45203: [X86] VRNDSCALE* folding from masked and single-value ffloor and fceil patterns

Mikhail Dvoretckii via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 5 05:10:56 PDT 2018


mike.dvoretsky updated this revision to Diff 149949.
mike.dvoretsky marked 2 inline comments as done.
mike.dvoretsky added a comment.

Corrected the scalar pattern predicates, added packed zero-masked instruction patterns and tests to cover zero-masking. Changed the RUN line of vec_floor.ll to give different results for AVX512F and AVX512VL where needed (e.g. in 128- and 256-bit masked operations).


https://reviews.llvm.org/D45203

Files:
  llvm/include/llvm/IR/IntrinsicsX86.td
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86InstrAVX512.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/test/CodeGen/X86/vec_floor.ll

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